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CHAPTER 13 INTERRUPTS

13-1

Figure 13-1 J10 and INT 1 location

CHAPTER SYNOPSIS

 Discusses types of interrupts

 Interrupt prior ity

DESCRIPTION

INTERRUPT S CHAPTER 13

Interrupts on the RPC-2350 can be broken down into two

general groups: Hardware and software. Hardware

interrupts are IN T 0 and IN T 1. Softwar e interrupts

include ON COM$, ON TIC K, ON KEYPA D, and

others that require software to execute.

Technically, timer and com munications are also

hardware interr upts. These are suppor ted through

software, and are consider ed software inter rupts.

The NM I hardware interr upt is brought out to the

expansion connector. It is not supported by

CAMBASIC. It is accessible by assembly language.

INTERRUPT HANDLING BY CAMBASIC

Interrupt generating and handling is a bit complex.

First, the gener al rule is exp lained then the e xceptions to

the rules are given.

When INT 0 and INT 1 lines go low, a CPU hardware

interrupt is generated. Software responds by setting a

flag. When the current CAMBASIC line is finished

executing, the line number specified in ON INT is

executed as a subroutine. Latency depends upon the

complexity of the current CAM BASIC line being

processed and when the interrupt occurred while the line

was processed. Typical latency is about 1 mS.

Software interrupts such as ON BIT, ON KEY PAD, and

ON INP require software processing. These routines

scan I/O lines every system tick time (0.005 seconds).

If a condition is met (keypad press, line changes status) a

flag is set. Now, here is where things get a bit

complicated.

The above interrupt tasks are checked every 8 program

line statements (typically 0.005 seconds). T his means

that response to a line change could take an additional 5

milli-seconds from the time the event took place.

Hardware interrupts are the exception. T he operating

system is forced to process these interrupts on the next

statement.

What happens when interrupts occur simultaneously?

There is an order of priority:

INT 0

INT 1

ON BIT 0 to

ON BIT 7

ON KEYPAD

ON T ICK 0 to

ON TICK 2

ON COM$ 1

ON COM$ 0

ON C OUN T 0 to

ON COUNT 7

ON INP 0 to

ON INP 7

If two interrupts happen simultaneously, they will be

checked and started in this order. Unless you use the

LOCK command, the next interrupt will not be

processed for 8 commands. This means you can have an

interrupt processing routine interrupt another, which can

interrupt another. Since these are all subroutines, the

number you ca n have active at one time is lim ited only

by the amount of available RAM.

Interrupt service routines should be written as short as

possible. Only those lines necessary to stop or start

something should be processed. Heavy duty analysis and

processing should be do ne in a non-tim e critical loop , if

at all possible.

HARDWARE INTERRUPTS

Hardware interrupts supported by CAMBASIC are INT

0 and INT 1. The real time clock uses INT 0, jumpered

via W10. (See Chapter 7). The counter/quadrature

encoder uses INT 1 (See Chapter 14). INT 1 also goes

to J10-2 for external interrupts. Be sure to remove any

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